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| ByteBlasterMV Female Plug's Pin Names & Download Modes |
| PS Mode | JTAG Mode |
| Pin | Signal Name | Description | Signal Name | Description |
| 1 | DCLK | Clock Signal | TCK | Clock Signal |
| 2 | GND | Signal Ground | GND | Signal Ground |
| 3 | CONF_DONE | Configuration
control | TDO | Data From Device |
| 4 | VCC | Power Supply | VCC | Power Supply |
| 5 | nCONFIG | Configuration
control | TMS | JTAG state
machine control |
| 6 | - | No connect | - | No connect |
| 7 | nSTATUS | Configuration
status | - | No connect |
| 8 | - | No connect | - | No connect |
| 9 | DATA0 | Data to device | TDI | Data to device |
| 10 | GND | Signal Ground | GND | Signal Ground |
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Altera FPGA and CPLD JTAG Serial Programmer.
Fully buffered.
Works with Altera's MAX+PLUS II and Quartus II Programming Software as a ByteBlasterMV programmer.
Supports target systems from 1.8V-5V. Supports SignalTap II logic analysis in
Quartus II software. Suports the following devices families:
- MAX series CPLDs
- Stratix series FPGAs
- Cyclone series FPGAs
- APEX series CPLDs
- ACEX 1K FPGAs
- Mercury FPGAs
- FLEX series FPGAs
- Excalibur FPGAs
- EPC devices
- And other PS or JTAG Mode devices
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Atmel UISP In System Programmer.
Fully buffered.
Works with open source UISP
to program Atmel microcontrollers including AVR, AT90S models and others.
Choose -dprog=abb when running UISP.
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